PURPOSE: To facilitate observation fo serial data output in the case of test and to easily revise test serial input data in the serial-parallel converter.

CONSTITUTION: A data selection circuit 1 selecting an input of a reception shift register 11 inputs an output of a transmission shift register 8 to the reception shift register 11 in the case of testing and parallel output data of the reception shift register 11 are readout into an internal bus 18 for the observation. Furthermore, a clock selection circuit 2 uses a clock of the reception shift register 11 for a clock signal of the transmission shift register 8 to take synchronization of the serial-parallel conversion and to make the conversion accurate.