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Title:
SIDE CHANNEL ATTACK RESISTANCE EVALUATING DEVICE, AND SIDE CHANNEL ATTACK RESISTANCE EVALUATING METHOD AND PROGRAM
Document Type and Number:
Japanese Patent JP2012080344
Kind Code:
A
Abstract:

To improve resistance evaluation accuracy by separating a signal source related to confidential information from the other signal sources which become noise.

A side channel information measuring portion 2 measures side channel information which leaks from an encryption device 1 of an evaluation target. A passing band deciding portion 4 decides a passing band of a quefrency window. A cepstrum analyzing portion 3 executes cepstrum analysis on tha basis of the passing band of the quefrency window, to the side channel information measured by the side channel information measuring portion 2. A DSCA resistance evaluating portion 5 determines the pros and cons of resistance to a side channel attack of the encryption device 1 of the evaluation target, on the basis of the side channel information analyzed by the cepstrum analyzing portion 3.


Inventors:
YAMASHITA TETSUTAKA
Application Number:
JP2010223993A
Publication Date:
April 19, 2012
Filing Date:
October 01, 2010
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04L9/10
Attorney, Agent or Firm:
Akio Miyazaki
Ishibashi Masayuki
Masaaki Ogata