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Title:
SIGNAL AMPLITUDE CONVERTING CIRCUIT
Document Type and Number:
Japanese Patent JPS61257017
Kind Code:
A
Abstract:

PURPOSE: To attain low power consumption and high speed performance by inserting a current interrupting element in the path of a stationary current and applying a signal in opposite phase to that of an output current or an output signal thereto so as to interrupt the stationary current.

CONSTITUTION: When an input signal is at a low level, a transistor (TR) Q3 is conductive, a potential at a terminal 7 reaches a potential by a potential drop of a diode D2 and a resistor R2 and the potential at a terminal 6 is only the potential drop of the diode D2. A PMOS-M11 connected to a terminal 6 is not conducted but a MOS-M13 connected to a terminal 7 is conductive and then a TR Q11 is conductive, the level of an output terminal 14 reaches a power supply voltage. Since a ground potential is generated at an output terminal 24, the MOS-M12 is interrupted and no current supply to the TR Q11 is caused. In this state, the potential at the terminals 14, 24 is kept by using the FF circuit comprising M14, M24, M15 and M25. Then the terminal 7 is connected to the MOS M21, which is conductive, a current is fed to the base of a TR Q20, the potential at the terminal 24 goes to a ground potential, the MOS M22 is interrupted, no current is fed to the TR Q21 and the potential at the terminal 24 is kept by the FF circuit.


Inventors:
HIGUCHI HISAYUKI
SUZUKI MAKOTO
Application Number:
JP9776785A
Publication Date:
November 14, 1986
Filing Date:
May 10, 1985
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03K3/356; G11C11/409; H03K5/00; H03K5/02; H03K19/00; H03K19/0175; (IPC1-7): H03K3/356; H03K5/00; H03K19/00
Attorney, Agent or Firm:
Katsuo Ogawa