Title:
SIGNAL GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JP3565590
Kind Code:
B2
Abstract:
PURPOSE: To make the characteristic evaluation efficient by realizing the signal generating circuit generating various PN signals and fixed pattern signals while suppressing the increase in the hardware amount thereby reducing the cost of a digital cordless telephone set and also a PHS.
CONSTITUTION: A PN signal generating circuit PNG generating various PN signals is formed by adding plural exclusive OR circuits E1-E6 and a signal selection circuit SL to a serial parallel conversion shift register SR provided on a serial interface section SI of a microcomputer section and used for setting an initial value of a phase locked loop circuit or the like in a digital cordless telephone set being a component of a PHS, and the simple ciphering processing, the scramble processing and the descramble processing using the PN signal are realized in terms of software by using the microcomputer section. Furthermore, the PN signal generating circuit PNG generates the PN signal and the fixed pattern signal for characteristic evaluation to provide a function of measuring an error rate of a communication channel or the like to the digital cordless telephone set.
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Inventors:
Hiroshi Imaseki
Yasuhiro Susaka
Takashi Kobayashi
Yasuhiro Susaka
Takashi Kobayashi
Application Number:
JP27834494A
Publication Date:
September 15, 2004
Filing Date:
October 18, 1994
Export Citation:
Assignee:
Renesas Technology Corp.
International Classes:
H03K3/84; H03M9/00; H04K1/04; H04L9/06; H04L9/14; H04L9/22; H04M1/00; H04W84/10; H04W88/02; (IPC1-7): H03K3/84; H03M9/00; H04K1/04; H04Q7/38
Domestic Patent References:
| JP2281817A |
Attorney, Agent or Firm:
Mitsumasa Tokuwaka