PURPOSE: To lower power consumption by reducing through current when output node potential changes between the potential which is higher than power source potential and the ground potential.
CONSTITUTION: When the output signal out of an output node 111a rises from ground potential to boosted voltage Vpp, electric charge is supplied to a node 111a by a first (p) channel MOTr 111c and the fourth (n) channel MOSTr 113b of an electric charge supply circuit 113, the signal rises quickly and a second (p) channel MOSTr 111d becomes non-conductive immediately. Therefore, the time when through current flows in a ground node 20 from the boosting node 11 via a Tr 11d and a second (n) channel MOSTr 112b is short and power consumption is low. At the time of a fall, electric charge is supplied to an anti-output node 111b by Tr 111d and Tr 113a, the signal falls quickly and Tr 111c becomes non-conductive immediately. Therefore, the time when through current flows in the node 20 from the node 11 via Tr 111c and 112a is short and power consumption is low.
JPH05205467 | DYNAMIC TYPE RAM |
JP2787918 | [Title of Invention] Semiconductor integrated circuit device |
JP3495787 | SEMICONDUCTOR DEVICE |
SAWADA SEIJI