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Title:
SIGNAL LEVEL CONVERSION CIRCUIT
Document Type and Number:
Japanese Patent JPH06243680
Kind Code:
A
Abstract:

PURPOSE: To lower power consumption by reducing through current when output node potential changes between the potential which is higher than power source potential and the ground potential.

CONSTITUTION: When the output signal out of an output node 111a rises from ground potential to boosted voltage Vpp, electric charge is supplied to a node 111a by a first (p) channel MOTr 111c and the fourth (n) channel MOSTr 113b of an electric charge supply circuit 113, the signal rises quickly and a second (p) channel MOSTr 111d becomes non-conductive immediately. Therefore, the time when through current flows in a ground node 20 from the boosting node 11 via a Tr 11d and a second (n) channel MOSTr 112b is short and power consumption is low. At the time of a fall, electric charge is supplied to an anti-output node 111b by Tr 111d and Tr 113a, the signal falls quickly and Tr 111c becomes non-conductive immediately. Therefore, the time when through current flows in the node 20 from the node 11 via Tr 111c and 112a is short and power consumption is low.


Inventors:
KAJIMOTO TAKESHI
SAWADA SEIJI
Application Number:
JP3153693A
Publication Date:
September 02, 1994
Filing Date:
February 22, 1993
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G11C11/407; H03K5/02; (IPC1-7): G11C11/407; H03K5/02
Attorney, Agent or Firm:
Takada Mamoru