PURPOSE: To obtain a signal modulation circuit capable of generating a highly accurate variable frequency signal by simple and inexpensive constitution.
CONSTITUTION: The signal modulation circuit is provided with plural signal delay circuits D1 to DN vertically connected to delay an original signal S0 almost by the same time, a signal selecting circuit SS for selecting and outputting the original signal S0 one of delay signals S1 to SN outputted from the circuits D1 to DN and a signal selection control circuit SSC for controlling the selection of a signal by the circuit SS. The circuit SSC allows the circuit SS to repeat operation for selecting the signal S0 or one of the delay signals S1 to SN outputted from respective delay circuits D1 to DN successively or every other signal or every plural signals in the increment order of delay time and within a range generating maximum delay time corresponding to a phase difference <360°.
JP2565155 | Description: Synchronous control device |
JPH0449717 | CLOCK REPRODUCTION CIRCUIT |
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