Title:
炭化珪素半導体基板および炭化珪素半導体基板の製造方法
Document Type and Number:
Japanese Patent JP7163575
Kind Code:
B2
Abstract:
To prevent deactivation of a ptype collector layer even when a scratch is made on a rear face side of a self-organized epitaxial substrate during a device process.SOLUTION: A silicon carbide semiconductor substrate comprises at least: an ntype drift layer 1; an ntype FS layer 2 which is provided on one principal surface of the ntype drift layer 1 and has a higher carrier concentration than the ntype drift layer 1; and a ptype collector layer 3 provided on a surface of the ntype FS layer 2 on the side opposite to the ntype drift layer 1 side. A total film thickness of the ntype FS layer 2 and the ptype collector layer 3 is equal to or greater than 1 μm.SELECTED DRAWING: Figure 1
Inventors:
Kensuke Takenaka
Satoshi Mizushima
Yoshiyuki Yonezawa
Satoshi Mizushima
Yoshiyuki Yonezawa
Application Number:
JP2017222327A
Publication Date:
November 01, 2022
Filing Date:
November 17, 2017
Export Citation:
Assignee:
Fuji Electric Co., Ltd.
International Classes:
H01L29/739; H01L21/205; H01L21/336; H01L29/12; H01L29/78
Domestic Patent References:
| JP2017084852A | ||||
| JP2012227419A |
Other References:
WANG, Xiaokun et al.,High-Voltage n-Channel IGBTs on Free-Standing 4H-SiC Epilayers,IEEE TRANSACTIONS ON ELECTRON DEVICES,2010年02月,VOL. 57, NO. 2,pp. 511-515,
FUKUDA, Kenji et al.,Development of Ultrahigh-Voltage SiC Devices,IEEE TRANSACTIONS ON ELECTRON DEVICES,2015年02月,VOL. 62, NO. 2,pp. 396-404,
FUKUDA, Kenji et al.,Development of Ultrahigh-Voltage SiC Devices,IEEE TRANSACTIONS ON ELECTRON DEVICES,2015年02月,VOL. 62, NO. 2,pp. 396-404,
Attorney, Agent or Firm:
Akinori Sakai
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