PURPOSE: To attain parallel simulation of logical element of parallel operation, by storing a data at each element of a digital circuit and storing the preceding data, and operating the element to which an input data is set.
CONSTITUTION: When the input data is given to an input/output sub-system 1, packets 11W13 corresponding to the input are formed and given to an execution control unit 2 via an arbiter 14. The unit 2 sets the data to templates 22, 23 via a distributor DIS21. The templates store the data relating to each element included in a digital circuit to be simulated, and when the required data is finished to be set to the templates, they are activated and transmit the data to an ALU 26 via the arbiter 25. The ALU26 performs required operation and sets the result to the templates via the DIS21. A function memory 3 stores the data before the noted generation, and the data read from the memory 3 is set to the template 24 allowing to perform simulation in parallel according to the career data.
ASADA KATSUHIKO
NISHIKAWA HIROAKI
OKAMOTO TOSHIYA
TOKURA TAKESHI
SHIMIZU MASAHISA
KAMIMURA KAZUO
MITSUBISHI ELECTRIC CORP
SHARP KK
MATSUSHITA ELECTRIC IND CO LTD