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Title:
SINGLE WAFER PROCESSING MECHANISM
Document Type and Number:
Japanese Patent JPH11289002
Kind Code:
A
Abstract:

To provide a single semiconductor wafer processing mechanism which is improved so as to reduce a cause of a drop in its reliability or yield.

A rotary base 2 is provided to have a predetermined uniform height of arcuate positioning parts 21 provided along its periphery to carry a semiconductor wafer 7 thereon. Movable holder members 4 for holding end face parts of the semiconductor wafer are inserted into gaps between the positioning parts 21 so as to form a continuous arcuate shape together with the parts 21. When the water 7 is carried on the rotary base 2, a height X mm of the positioning parts 21 and holder members 4 projected from a position 22 of the base contacted with a rear side of the wafer satisfies a relationship of 0<X<A+0.5 mm, where A denotes a thickness of the end face of the wafer (in mm). Thereby when the wafer is rotated at a high speed, splashing of a processing solution, irregular treatment of the wafer caused by disturbance of an air flow and detouring of the processing solution to the rear side of the wafer can be remarkably reduced.


Inventors:
SHIYAURA HAJIME
Application Number:
JP9141698A
Publication Date:
October 19, 1999
Filing Date:
April 03, 1998
Export Citation:
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Assignee:
TOSHIBA MICRO ELECTRONICS
TOSHIBA CORP
International Classes:
H01L21/683; H01L21/027; H01L21/304; H01L21/306; H01L21/68; (IPC1-7): H01L21/68; H01L21/027; H01L21/304; H01L21/306
Domestic Patent References:
JPS6389246U1988-06-10
JPH0637077A1994-02-10
JPH09232276A1997-09-05
JPH0945750A1997-02-14
JPH0613136U1994-02-18
JPH0774143A1995-03-17
JPH06291030A1994-10-18
JPH09232269A1997-09-05
Attorney, Agent or Firm:
Takehiko Suzue (6 outside)