Title:
SOLID-STATE IMAGE SENSING DEVICE AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP3782297
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To improve performance of an element by resolving problems of pseudo-signal and potential barrier caused by requirements of miniaturizing an element and low power supply voltage in a conventional solid-state image sensing device, wherein potential barrier is further raised by low power supply voltage, thus further increasing after-image and noises.
SOLUTION: A read gate electrode 13a is formed selectively on a silicon substrate, and an N-type drain region 14a is formed in one end of the read gate electrode 13a. An N-type signal storage region 15 is formed in the other end of the read gate electrode 13a. A P+-type surface shield region 21a is formed by selective epitaxial growth on the signal storage region 15, and a silicide block layer 19, which consists of a silicon oxide film and a silicon nitride film and covers at least a part of the signal storage region 15, is formed on the surface shield region 21a. A Ti silicide film 33a is formed on the drain region 14a.
Inventors:
Hidetoshi Nozaki
Ikuko Inoue
Hiroshi Yamashita
Ikuko Inoue
Hiroshi Yamashita
Application Number:
JP2000302660A
Publication Date:
June 07, 2006
Filing Date:
October 02, 2000
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L21/28; H01L27/146; H01L21/8238; H01L27/092; H01L29/41; H01L29/417; H04N5/335; H04N5/357; H04N5/369; H04N5/374; (IPC1-7): H01L27/146; H01L21/28; H01L21/8238; H01L27/092; H01L29/41; H04N5/335
Domestic Patent References:
| JP2000031449A | ||||
| JP3025975A |
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Sadao Muramatsu
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Sadao Muramatsu
Ryo Hashimoto