PURPOSE: To execute write and read-out at a low speed, and to convert a bit rate by switching alternately write and read-out by a clock signal of a higher frequency in input/output data signals.

CONSTITUTION: A phase difference of a cock signal 101 and 102 is detected by a phase detector 1, and a clock signal 104 is henerated by a clock pulse generator 2, and stored temporarily in a flip-flop 3. Subsequently, a data signal 106 corresponding to the signal 104 is written in a RAM5 through a data selector 6, by a clock signal 107 which has been delayed by 1/4 bit by a delaying circuit 12. This write operation is executed by a prescribed timing by a write pulse generated by a write pulse generator 11. Also, read-out of a data is executed by sampling an input of a flip-flop 10 in a period in which the data selector 6 and an address selector 7 are switched to the read-out side.