To store interface specification definition information capable of expressing parallel operations in a computer readable storage medium while reducing information quantity.
This storage medium is provided with a first identifier area 111 for storing the combination pattern of the signal value of each terminal of a first terminal group 102 as a first identifier group, a second identifier area 121 for storing the combination pattern of the signal value of each terminal of a second terminal group 103 as a second identifier group, and a third identifier area 141 for storing the function of a circuit module defined as the combination of the first identifier and the second identifier as a third identifier group. The third identifier includes a code (par) indicating that the order of the start of the combination pattern corresponding to the first identifier and the combination pattern corresponding to the second identifier is irregular.
SUZUKI TAKASHI
NAKADA TSUNEO
IWASHITA HIROAKI
FURUWATARI SATOSHI
FUJITSU LTD
Next Patent: LOGIC CIRCUIT DESIGNING METHOD