Title:
パッキング密度の高い電子放出デバイスの構造
Document Type and Number:
Japanese Patent JP3699114
Kind Code:
B2
Abstract:
A method comprising the steps of: causing charged particles to pass through a track layer to form a multiplicity of charged-particle tracks therethrough; creating corresponding open spaces through the track layer by a procedure that entails etching the track layer along the charged-particle tracks; forming electron-emissive elements accessible through the open spaces in the track layer; and subsequently providing a patterned electrically non-insulating gate layer over the electron-emissive elements such that gate openings extend through the gate layer to enable each gate opening to expose at least one of the electron-emissive elements.
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Inventors:
Macauray, John M
Spinto, Christopher Jay
Searson, Peter Sea
Dubock, Robert M. Jr.
Spinto, Christopher Jay
Searson, Peter Sea
Dubock, Robert M. Jr.
Application Number:
JP50871395A
Publication Date:
September 28, 2005
Filing Date:
September 08, 1994
Export Citation:
Assignee:
CANDESTENT INTELLECTUAL PROPERTY SERVICES INC.
International Classes:
H01J1/30; H01J1/304; H01J3/02; H01J9/02; H01J29/04; H01J31/12; (IPC1-7): H01J9/02; H01J1/30; H01J31/12
Domestic Patent References:
| JP1149351A | ||||
| JP5094760A | ||||
| JP1300558A | ||||
| JP4359831A | ||||
| JP5097598A | ||||
| JP3182029A | ||||
| JP5211030A | ||||
| JP5205615A | ||||
| JP51097971A | ||||
| JP729484A |
Attorney, Agent or Firm:
Yoichi Oshima