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Title:
SUPERCONDUCTIVE LOGIC CIRCUIT
Document Type and Number:
Japanese Patent JP2000031814
Kind Code:
A
Abstract:

To unnecessitate a phase shifter and to stabilize an operation by interposing a superconductive line of wire length corresponding to a propagation delay time to be corrected in order to make the propagation delay time or phase which correspond to the phase difference of AC current which should be fed to each other the same between the stage of logic circuits of a fluxoid quantum parametron gate and serially connecting them between gate row.

The excitation lines of logic gate rows 100, 200,...500 on each stage are serially connected. Excitation current of the excitation line of the logic gate row 100 on a 1st stage is fed through a feeder line 1 and also the excitation current is successively fed to the excitation line of the logic gate row of each stage by means of inter-stage connecting excitation lines 4 of logic gate rows. The excitation line length L1 of the logic gate existing in the logic gate row of each stage is made ≤ about 10% of the length L2 of logic gate inter-stage connecting excitation lines 4 which are connected with the logic gate excitation lines of respective stages. Thus, AC current which is shifted by 1/4 cycle can be fed to adjacent logic gate rows and an ALU circuit is driven in a four-phase excitation mode.


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Inventors:
TARUYA YOSHINOBU
TAKAGI KAZUMASA
HASEGAWA HARUHIRO
FUKAZAWA TOKUMI
TSUKAMOTO AKIRA
Application Number:
JP20016398A
Publication Date:
January 28, 2000
Filing Date:
July 15, 1998
Export Citation:
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Assignee:
AGENCY SCIENCE & TECH
International Classes:
H01L39/22; H03K19/195; (IPC1-7): H03K19/195; H01L39/22
Attorney, Agent or Firm:
Akio Takahashi