PURPOSE: To eliminate a charge of an integral capacity by a period of an integer multiple of a sampling period by providing a switched capacitor integration circuit having the integral capacity for accumulating the charge, and a switch for making a path for short-circuiting both pole plates of the integral capacity.

CONSTITUTION: A switched capacitor network 1 is operated by a sampling period T. Its output signal is synchronized with switches 2, 4 operated by the period T and charged to an input capacity 3, and discharged to an opposite phase input of an operational amplifier 7. The opposite phase input of the amplifier 7 is a high impedance input, therefore, the discharged charge is all accumulated in an integral capacity 6. A switch 5 is opened and closed so that the charge of the capacity 6 is eliminated whenever charge is executed (n) times. A switch 9 of a switched capacitor network 8 operated by a sampling period nT is opened and closed so that an output of the operational amplifier 7 is brought to sampling at the time point when an input signal has been charged (n) times to the integral capacity 6.