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Title:
SYNCHRONIZING METHOD AND APPARATUS FOR PSEUDO-RANDOM- PATTERN GENERATING CIRCUITS
Document Type and Number:
Japanese Patent JP2003198336
Kind Code:
A
Abstract:

To provide a new synchronizing method and apparatus whereby, when the pseudo-random-pattern generating circuits having the mark ratio of 1/4, 1/8, or the like are synchronized with each other, their synchronization takes a short time independently of the period of a testing pattern.

In the synchronizing method and apparatus of the pseudo- random-pattern generating circuits having a variable mark ratio, the pseudo- random-pattern generating circuits are synchronized with each other by a step for setting them before their pull-in to the pseudo-random-pattern generating circuits having the mark ratio of 1/2, by a step for executing their pull-in in the state wherein they are set to the pseudo-random-pattern generating circuits having the mark ratio of 1/2, and by a step for returning them after their pull-in to the pseudo-random-pattern generating circuits having a predetermined mark ratio.


Inventors:
TSUTSUMI SEIICHI
OTOSHI KENJI
Application Number:
JP2001391368A
Publication Date:
July 11, 2003
Filing Date:
December 25, 2001
Export Citation:
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Assignee:
ANDO ELECTRIC
International Classes:
H03K3/84; (IPC1-7): H03K3/84
Attorney, Agent or Firm:
Noriaki Miyakoshi (1 person outside)