Title:
SYSTEM AND METHOD FOR TRANSMITTING DATA
Document Type and Number:
Japanese Patent JP3558599
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a system where the margin of set-up time and holding time when data are transmitted between a master device and a slave device is large.
SOLUTION: The slave device 30 includes a clock signal generating part 32 generating a slave side clock signal CLKSOUT, a phase adjusting circuit, output circuits 331 to 33m outputting a transmission data signal in response to the slave side clock signal CLKSOUT and a timing reference signal output circuit 34. The master device 10 includes an inner clock generating circuit 11 generating a master side clock signal CLKM, input circuits 121 to 12m sampling the transmission data signal in response to it and a phase comparing circuit generating a phase adjustment instructing signal SADJOUT based on a timing reference signal and the master side clock signal, and the phase adjusting circuit adjusts the phase of the slave side clock signal CLKSOUT corresponding to the phase adjustment instructing signal.
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Inventors:
Toru Ishikawa
Application Number:
JP2001027467A
Publication Date:
August 25, 2004
Filing Date:
February 02, 2001
Export Citation:
Assignee:
NEC
NEC Electronics Corporation
NEC Electronics Corporation
International Classes:
G06F1/12; G06F13/42; H04L7/02; H04L7/00; (IPC1-7): H04L7/02; G06F1/12; G06F13/42
Domestic Patent References:
| JP2206933A | ||||
| JP11007335A | ||||
| JP2000138661A |
Attorney, Agent or Firm:
Minoru Kudo
Masao Omura
Masao Omura
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