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Title:
【発明の名称】データ情報保持装置
Document Type and Number:
Japanese Patent JP3360849
Kind Code:
B2
Abstract:
An arrangement of cells with input and output steering circuitry as well as internal shifting capabilities is disclosed which advantageously provides a first in/first out (FIFO) register circuit which can be written to and read from in contiguous clock cycles. The FIFO register circuit is provided with an arrangement of self contained FIFO cells, each cell containing its own input multiplexer and control circuitry.

Inventors:
Nadel Ameenie
Beechala Fouad Bowery
Sherwood Brannon
Terence joseph roman
Application Number:
JP24812892A
Publication Date:
January 07, 2003
Filing Date:
September 17, 1992
Export Citation:
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Assignee:
INTERNATIONAL BUSINESS MASCHINES CORPORATION
International Classes:
G06F12/00; G06F5/06; G11C7/00; (IPC1-7): G06F5/06; G11C7/00
Domestic Patent References:
JP243621A
JP216630A
Attorney, Agent or Firm:
Kiyoshi Goda (2 outside)



 
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