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Patent Searching and Data


Title:
RANDOM-ACCESS MEMORY
Document Type and Number:
Japanese Patent JPH0793993
Kind Code:
A
Abstract:

PURPOSE: To detect and correct an error in a smaller number of parity bits by a simple circuit.

CONSTITUTION: Regarding word data which is selected by a row address AR, four parities in the X-axis direction are found by a selector 14x for parity and by a parity generation circuit 15x. Four parities in the Y-axis direction are found by a selector 14y for parity and by a parity generation circuit 15y. Four parities in the Z-axis direction are found by a selector 14z for parity and by a parity generation circuit 15z. When errors are caused in a bit for the word data, the parities in the X-axis, Y-axis and Z-axis directions which contain the errors are combined, bit positions in which the errors have been caused are detected, and the errors are corrected by an error correction part 22b. A total of 4×3=12 are sufficient as the parities which are required.


Inventors:
NAGAGAWA YUKIMITSU
Application Number:
JP23952193A
Publication Date:
April 07, 1995
Filing Date:
September 27, 1993
Export Citation:
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Assignee:
KAWASAKI STEEL CO
International Classes:
G11C11/413; G06F11/10; G11C11/401; G11C29/00; G11C29/42; (IPC1-7): G11C29/00; G06F11/10; G11C11/401; G11C11/413
Attorney, Agent or Firm:
Satoshi Takaya (2 outside)