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Title:
OPERATION MONITOR OF CPU
Document Type and Number:
Japanese Patent JPH0675824
Kind Code:
A
Abstract:

PURPOSE: To prevent a malfunction by a transient cause, and to improve reliability of a system.

CONSTITUTION: By a first timer 6a to which first short time width wl is set, and a second timer 6b to which second long time width w2 is set, a monitor pulse P led out of a CPU 2 is monitored. When abnormality is detected in the monitor pulse P, a first timer 6a leads out a reset signal RST, and resets an operation of the CPU2 without driving a warning lamp 5. In the case abnormality of the monitor pulse is detected continuously even after reset is released, and it is continued even after exceeding second time width w2, at least the warning lamp 5 is driven by an output of a second timer 6b, and abnormality is informed. In such a way, a malfunction of a system caused by a transient noise, etc., is prevented, and reliability of the system is improved.


Inventors:
KINOSHITA KENICHI
Application Number:
JP22863392A
Publication Date:
March 18, 1994
Filing Date:
August 27, 1992
Export Citation:
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Assignee:
FUJITSU TEN LTD
International Classes:
G06F11/30; (IPC1-7): G06F11/30
Attorney, Agent or Firm:
Nishikyo Keiichiro



 
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