PURPOSE: To make a rise in output pulse voltage sharp and to suppress the generation of an induced pulse voltage, by connecting the input terminal of an up switching element to a power source for a higher power voltage than that of a current supplying power source through a high resistance.

CONSTITUTION: The input terminal of an up-MOST.Qu is biased by a power voltage VB supplied from a terminal 7 through a resistance RBG when a down- MOST.Qd is turned of, so the MOST.Qu is turned on and the potential at a point P1 never enters into a stray state, so that an output pulse voltage V0 has a value Vs invariably. Therefore, an induced pulse voltage by the elecdrostatic induction of a high pulse voltage is suppressed. Further, the voltage VB applied to the terminal 7 is set higher than the voltage VS applied to a terminal 3, so a rise of the output pulse voltage V0 varies according to the time constant determined by a resistance RG and a capacitor Cd is made shaper.