Title:
【発明の名称】不揮発性半導体メモリ装置の書込回路
Document Type and Number:
Japanese Patent JP2900523
Kind Code:
B2
Abstract:
An electrically programmable read only memory device is equipped with a plurality of write-in circuits (WR11 to WR18) for concurrently writing a plurality of data bits into memory cells (M11 to Mmn; MBL12 to MBL18), wherein a write-in controlling unit (15) sequentially produces a plurality of write-in controlling signals (WCL1/WCL2) supplied to a transfer gate groups for sequentially transferring the data bits to column selectors (CSL11 to CSL18) respectively associated with memory cell blocks (MBL11 to MBL18) so that the peak current in the write-in operation is not increased together with the number of the data bits concurrently written into the memory cells.
Inventors:
HIGUCHI MISAO
Application Number:
JP14251490A
Publication Date:
June 02, 1999
Filing Date:
May 31, 1990
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
G11C17/00; G11C16/02; G11C16/10; G11C17/18; (IPC1-7): G11C16/02
Domestic Patent References:
| JP6222297A | ||||
| JP1125800A | ||||
| JP6183200U |
Attorney, Agent or Firm:
Naotaka Ide