Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
PROCESSING DEVICE OF POWER FAILURE OF DATA TRANSMISSION SYSTEM
Document Type and Number:
Japanese Patent JPS5941944
Kind Code:
A
Abstract:

PURPOSE: To prevent completely the phase shift between a main system and an interface, by storing the interface management state of the main system at a power failure time while power supply is cut off and referring to management information at the power failure time to restart the transfer control when power supply is recovered.

CONSTITUTION: When power supply is recovered, flags stored in an area H are referred to perform the data transfer control. The set state of a flag WED is referred to in the transmitting operation, and the set state of a flag RED is referred to in the receiving operation. When the flag WED is set, it indicates that the power failure occurs at the completion time of data transfer of one block, and it is sufficient if data of the next new block is transferred; but when the flag WED is reset at the power supply recovery time, data of said one block is transferred again from the beginning.


More Like This:
Inventors:
MATSUI YOSHIMITSU
HORIGUCHI MICHIYUKI
OOHASHI MASAKAZU
Application Number:
JP15298182A
Publication Date:
March 08, 1984
Filing Date:
August 31, 1982
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SHARP KK
International Classes:
H04L69/40; H04L12/413; (IPC1-7): H04L11/00
Domestic Patent References:
JPS5439504A1979-03-27
JPS4853639A1973-07-27
JPS55135398A1980-10-22
Attorney, Agent or Firm:
Hisao Komori