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Patent Searching and Data


Title:
LEVEL CONVERTING CIRCUIT
Document Type and Number:
Japanese Patent JPS6042937
Kind Code:
A
Abstract:

PURPOSE: To obtain simply a TTL output while keeping the effect to be exerted of other parts minimum value by adding a simple circuit to a current switching logical (ECL) circuit.

CONSTITUTION: A resistor R2, NPN transistors (TRs) Q3, Q4 and a constant current source I1 form a current switching logical circuit (ECL), and the switching operation is executed by a reference potential VREF set almost to a central value to a logical level of an input signal VIN. A resistor R1 and PNP TRs Q1, Q2 form a TTL output circuit and a TTL level is outputted depending on the ON/OFF of the TRQ3. Through such a constitution above, when the input VIN is at a high level, the input of the TTL circuit is kept to a high level. When the VIN is at a low level, a low level current flows to GND from the input of the TTL circuit via the resistor R1 and the potential is kept to the low level.


Inventors:
TAKAHASHI TOORU
Application Number:
JP15130683A
Publication Date:
March 07, 1985
Filing Date:
August 19, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03K5/02; H03K19/018; H03K19/086; (IPC1-7): H03K5/00
Attorney, Agent or Firm:
Uchihara Shin