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Patent Searching and Data


Title:
MEMORY CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPS5922150
Kind Code:
A
Abstract:

PURPOSE: To control a data area by setting an area whose reading and writing are performed on a device side automatically when the capacity of a memory is extended optionally.

CONSTITUTION: A processor 1 executes a control program in a main memory 4. The processor 1 reads information on the connection of an extension memory 5 from a connector through a bus 6 by the system generating program in the head of the control program. If the extension memory 5 is not connected, the processor 1 allows a data area 4b in the memory 4 other than a preset program area 4a to be read and written. When the extension memory 5 is connected, the data area 4b of the main memory 4 and the whole area of the extension memory 5 are permitted to be read and written. Thus, a readable and writable area is set according to the capacity of the memory and then prescribed processing is performed.


Inventors:
KISHI HAJIME
TANAKA KUNIO
TAKEGAHARA TAKASHI
Application Number:
JP13160482A
Publication Date:
February 04, 1984
Filing Date:
July 28, 1982
Export Citation:
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Assignee:
FANUC LTD
International Classes:
G06F12/16; G06F12/06; G06F13/00; (IPC1-7): G11C8/00
Attorney, Agent or Firm:
Minoru Tsuji