PURPOSE: To restart the execution of a progarm by giving an instruction to a CPU to return to the address of an instruction which detected an error in response to the type of said instruction and the error detecting time point to perform a retry of said instruction when a read-in error of the program is detected.

CONSTITUTION: An address signal is delivered from a CPU1 which is set in a normal state at the beginning of the 1st machine cycle M1 during an execution period T1 of an error converting instruction and in an output period TA of an address latch enable signal ALE. Then the address of an operation code OPC to be fetched is latched by an address latch 3 in address fetching timings AH and AL of the same period as the period TA. The OPC is decided as an error in an error detection timing ED, and therefore an error signal ERR is immediately delivered at a time point tE1. Then an address/data bus AD1 is cut off by a bi- directional bus gate 5, and therefore the OPC is not fetched. Instead an operation code OPC-JR1 of an unconditional branching instruction is delivered and fetched in the form of a dummy data DD. A retry is performed for the error converting instruction in the following period.