Title:
ARRAY PROCESSOR
Document Type and Number:
Japanese Patent JPS60179871
Kind Code:
A
Abstract:
PURPOSE:To actuate effectively each processing element and to attain highly efficient processing by executing processing for transferring respective processing results of all the processing elements to respective adjacent processing elements in parallel with the processing unit of each processing element. CONSTITUTION:Respective processing elements PE having prescribed I/O means and operation means respectively are connected through multiplexers 2-1- 2-n for switching a data transfer bus 5 and an external input data bus 3 to transmit/receive data between the adjacent processing elements PE. During the simultaneous transfer of respective processed results to the adjacent processing elements, the respective processing elements execute normal processing unit by the prescribed number of times. Therefore, operation for all combination between two kinds of variables and gradual operation using the operated result and having the local dependence of data can be executed highly efficiently while operating respective processing elements effectively.
Inventors:
TAKAHASHI JIYUNICHI
HATSUTORI SANSHIROU
KIMURA TAKASHI
IWATA ATSUSHI
HATSUTORI SANSHIROU
KIMURA TAKASHI
IWATA ATSUSHI
Application Number:
JP3445084A
Publication Date:
September 13, 1985
Filing Date:
February 27, 1984
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
G06F15/16; G06F15/173; G06F15/80; G06F17/16; G06K9/62; G06T1/20; (IPC1-7): G06F15/16; G06F15/347; G06K9/62
Attorney, Agent or Firm:
Masaki Yamakawa