PURPOSE: To attain early resynchronization, by shifting sequentially the direction of shift of a PN code in both positive and negative directions based on the point of time when the shift of synchronism is discriminated, and increasing the position of shift of the PN code until the synchronism is taken.

CONSTITUTION: If the synchronism is deviated by noises, etc, a signal (b) representing uncorrelation is outputted from a correlation discriminating circuit 2 and a shift clock B is delayed by 1/2 bit at a timing generating circuit 4. A ring counter 6 receiving a discrimination timing signal A is updated in this case, and a PN code generating circuit 3 designating the same address as the preceding frame of a memory circuit 5 and setting its content in the PN code generating circuit 3 outputs a PN code P(t) delayed by 1/2 bit to the preceding frame, and the correlation discriminating circuit 2 takes the correlation with a receiving signal S(t). Since the synchronism is taken by shifting largely the phase of the PN code P(t) in both the positive and negative directions sequentially, the synchronism is taken early when the deviation is comparatively small.