PURPOSE: To allow both an injection integrated logic circuit and a linear circuit having n-p-n type Tr of high withstand voltage and low collector series resistance to be formed on one substrate by compensating to implant impurity ions of reverse conductive type on a high specific resistance epitaxial layer.

CONSTITUTION: After n+ type buried layer 3 is formed on a p- type Si semiconductor substrate 1, an n type Si layer 4 of relatively low specific resistance due to epitaxial grown is formed and then an isolation p+ type layer 5 is formed by boron deposition and prediffusion. Thereafter, with oxidized film 6 as a mask boron is implanted on the element formed in high withstand voltage at the linear side (region II) to diffuse it in a well. Then, an injector p type layer 8 and an n-p-n type inverter p type base layer 9 are formed on an IIL element (region I ) side, and a base p type layer of n-p-n type Tr is formed at the region II side. Then, the multicollector n+ type layer 11 of the region I , the collector contact n+ type layer 12 of region II and an emitter n+ type layer 13 are formed by implanting and diffusing phosphorus and arsenic, and electrodes and wiring between the electrodes are then formed.