Title:
MANUFACTURE OF SEMICONDUCTOR ELEMENT
Document Type and Number:
Japanese Patent JPS6053036
Kind Code:
A
Abstract:
PURPOSE:To reduce residual stress and deformation of a semiconductor element by a method wherein the difference of the coefficients of thermal expansion between a metal plate to be alloyed and a silicon wafer is considered, and the member having the smaller coefficient of thermal expansion is formed previously to a recession, and then alloying is performed. CONSTITUTION:The surfaces of a recessed alloying jib 6 and a protruded alloying jig 7 to come in contact respectively with a molybdenum plate 3 and a silicon wafer 1 are processed to spherical surfaces, and the radius of curvature thereof is made as to be the same with the radius of curvature of the wafer when the wafer is warped. The members thereof are so set as to make the silicon wafer 1 side, namely the smaller side of the coefficient of thermal expansion to be the recession, and tightened by clamping bolts 9 up to make the silicon wafer 1 and the molybdenum plate 3 to adhere closely respectively to the protruded alloying jig 7 and the recessed alloying jig 6. The temperature is risen to 700 deg.C in this condition to melt a solder material 2, and after alloyed, cooled to the normal temperature, then when the clamping bolts 9 are removed and the semiconductor element is taken out, because the members are deformed by the amount corresponding to the difference of thermal expansions of the molybdenum plate 3 and the silicon wafer 1 at alloying time in this case, deformation and residual stress of the semiconductor element can be reduced sharply, and the semiconductor element having an extremely small warp can be obtained.
Inventors:
NAKAMURA MASAMI
Application Number:
JP16215983A
Publication Date:
March 26, 1985
Filing Date:
September 02, 1983
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L21/52; H01L21/58; (IPC1-7): H01L21/58
Attorney, Agent or Firm:
Masuo Oiwa