MONOLITHIC CIRCUIT - NIPPON ELECTRIC CO

Title:

MONOLITHIC CIRCUIT

Document Type and Number:

Japanese Patent JPS59123270

Kind Code:

A

Abstract:

PURPOSE: To obtain a circuit which decreases thermal resistance and reduces source inductance and matching circuit loss by thinning the substrate at the part wherein an FET is formed.

CONSTITUTION: The region wherein the FET 21 and a ground electrode 27 are formed is thinned by etching the substrate 20, and a through hole 29 is formed by etching from the surface of the substrate 20. A ground conductor 30 is provided on the back surface of the substrate including also the thinned part, and the ground electrode 27 and the source electrode S of the FET 21 connect it. The thermal resistance and the source inductance are reduced by thinning the substrate thickness in the lower part of the FET 21, and a monolithic amplifying circuit which does not increase the circuit loss can be obtained by thickly leaving the substrate at the part of a matching circuit.

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Inventors:

NOGUCHI TSUTOMU

Application Number:

JP22905182A

Publication Date:

July 17, 1984

Filing Date:

December 28, 1982

Export Citation:

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Assignee:

NIPPON ELECTRIC CO

International Classes:

H01L29/812; H01L21/338; H01L23/12; H01L29/80; (IPC1-7): H01L23/12

Other References:

IEEE TRANSACTIONS ON ELECTRON DEVICES=1981
IEEE TRANSACTIONS ON ELECTRON DEVECES=1981

Attorney, Agent or Firm:

Naoki Kyomoto (2 outside)

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Next Patent: MANUFACTURE OF COMPOUND SEMICONDUCTOR DEVICE