Title:
REFERENCE VOLTAGE GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JPS60128518
Kind Code:
A
Abstract:
PURPOSE:To realize a stable and highly accurate circuit by using an operational amplifier where an output voltage is attained at a desired voltage or over at all times. CONSTITUTION:An output stage of the operational amplifier is of cascade connection of P-channel MOSes as shown in Fig. and the gate of an MOS transistor (TR) M1 is grounded. When a power supply voltage VD is applied, an output voltage is ensured to a value decided by the size of the MOS TRs M1 and M2 and resistors R4, R5 even if the input voltage is zero, and an input/output voltage characteristic is attained as shown in Fig. A desired value is obtained at all times as an output voltage VREF while the input voltage is not zeroed by using the operational amplifier so as to constitute a band gap reference voltage generating circuit.
Inventors:
KOBAYASHI YOUICHI
SUZUKI HIROSHI
SUZUKI HIROSHI
Application Number:
JP23740383A
Publication Date:
July 09, 1985
Filing Date:
December 16, 1983
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
G05F3/30; G05F3/24; (IPC1-7): G05F3/22
Attorney, Agent or Firm:
Uchihara Shin