Title:
ADAPTER DEVICE CONTROLLING MICROPROCESSOR
Document Type and Number:
Japanese Patent JPS5831783
Kind Code:
A
Abstract:
Microprocessor-controlled adapter circuit for real-time controls, in particular for print hammer controls in line printers with revolving type carrier with two asynchronously driven FIFO buffers (FIRST IN, FIRST OUT). The first FIFO buffer contains time values (e.g., firing times for the print hammers) and the second FIFO buffer control information associated with these time values (e.g., print hammer address, control commands for the print hammer). By a request circuit (e.g., counters), the time values are successively read from the first FIFO buffer and fed to a gate circuit for switching the control information, associated with these time values, from the second FIFO buffer for controlling the output values. A method of determining the firing times of the print hammers uses a reduced table in which for each character in each print position the positions (time values), in which the character is to be printed, are stored only for some displacement values of the revolving type carrier relative to the printer frame. For the remaining displacement values, the time values for character printing can be determined by division, using the table data. Mechanical or electrical tolerances influencing the firing times of the print hammers are compensated for by accommodating in the table additional correction delay values for the print hammers, thus eliminating adjustments.
Inventors:
YAN BAATERU
HAAMAN ERU BUBURITSUTSU
HAAMAN ERU BUBURITSUTSU
Application Number:
JP13133982A
Publication Date:
February 24, 1983
Filing Date:
July 29, 1982
Export Citation:
Assignee:
IBM
International Classes:
B41J1/20; B41J7/36; B41J9/46; G05B19/042; G06K15/06; G06K15/08; (IPC1-7): B41J1/20; B41J9/00; G06K15/06
Domestic Patent References:
| JPS5359333A | 1978-05-29 |
Attorney, Agent or Firm:
Jiro Yamamoto