Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6043844
Kind Code:
A
Abstract:
PURPOSE:To open a through hole in a self-matching way and to improve the integration degree of an element by a method wherein a second CVD insulating film is formed in a film thickness thicker than a total of the film thickness of a first wiring conductive film and that of a first CVD insulative film, and after that, the second CVD insulating film is flatened and is performed a reactive ion etching under a certain specified condition. CONSTITUTION:A first wiring conductive film 13 is adhered on a silicon oxide film 12 adhered on a silicon substrate 11, whereon an element has been formed, and after that, a silicon oxide film 14, for example, is formed as a first insulating film. A double-layer wiring pattern of the first insulating film 14 and the first wiring conductive film 13 is formed by a reactive ion etching method, and a nitriding film 15, for example, is again formed as a second insulating film. Then, the silicon nitriding film 15 is flatened by a reactive ion etching method. For example, the silicon oxide film 14 in the opening part is etched by a reactive ion etching method, wherein mixed gas of CF4 and H2 is used, until the surface of the aluminum wiring pattern 13 in the lower layer below the silicon oxide film 14 is made to expose in a condition that the etching speed of the silicon oxide film 14 is faster than that of the silicon nitriding film 15.
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Inventors:
YAMABE KIKUO
Application Number:
JP15151683A
Publication Date:
March 08, 1985
Filing Date:
August 22, 1983
Export Citation:
Assignee:
TOSHIBA KK
International Classes:
H01L23/522; H01L21/302; H01L21/3065; H01L21/768; (IPC1-7): H01L21/302
Attorney, Agent or Firm:
Noriyuki Noriyuki