PURPOSE: To obtain a simple-constitution and economical clock pulse shaping circuit, by resetting a flip flop by the output of a delay circuit whose delay time is set to a normal pulse width.
CONSTITUTION: When a clock pulse CLi having a distorted pulse width is inputted to an input terminal CP of a flip flop FF, output "1" is issued from an output terminal Q at its rise time. This output is delayed by a delay circuit DL1, whose delay time is set to a normal pulse width, and is applied to a reset pulse generating circuit RS, and the reset signal is applied to the set terminal of the FF to reset the FF, and output "0" is issued. Consequently, the simple-constitution and economical clock pulse shaping circuit is obtained for a sufficient use only by shaping the pulse width of clock pulses.
AOKI KENZOU
TAKECHI HIROAKI
MIYAKE HIROSHI
| JPS55109029A | 1980-08-21 | |||
| JPS57113617A | 1982-07-15 |
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