PURPOSE: To contrive formation of microscopic element, to prevent disconnection of lead-out electrode, and to contrive formation of microscopic second layer wiring pattern by a method wherein the electrode lead-out hole to a source and drain region is provided at a part of a gate.
CONSTITUTION: A gate oxide film 24 and a poly Si gate electrode 25 are provided on the surface of a p type Si substrate 21 which is surrounded by a filed oxide film 22, n-layers 261 and 271 are provided, and a CVD SiO2 film 28 is coated. A reactive ion etching is performed on the film 28, and a film 28' is left on the side wall of the electrode 25 and the oxide film 24. Subsequently, n-layers 262 and 272 are provided, and a source region 29 and a drain region 30 are formed. Then, a CVD SiO2 31 is superposed, and when an aperture 32 is provided by performing an etching, the erosion of the side wall of the gate oxide film can be prevented by the SiO2 film 28'. Then, Al electrodes 33 and 34 are attached and the titled device is completed. According to this constitution, an element can be microscopically formed without using a microscopic photoetching technique and a processing technique, and simplification of manufacturing process and improvement in the yield of production can be accomplished.
JPS5772321A | 1982-05-06 | |||
JPS5444482A | 1979-04-07 |
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