PURPOSE: To utilizing effectively an input data channel, by constituting a multiplexing circuit of the same circuit form, using a signal path selecting circuit, and time division-processing a high level digital signal by a sample rate of eight times of other signal.

CONSTITUTION: An input signal 14 is all time division-multiplexed by an 8:1 multiplexer circuit 15 and an N:1 multiplexer circuit 16, and the processing path is switched by a 1:3 signal path selecting circuit 17. An analog signal is inputted to a shift register circuit 12 as an eight-bit parallel A/D converted data quantized by an A/D converting circuit 7. A serial digital signal is inputted to the shift register circuit 12 through a 2:1 signal path selecting circuit 19, as a series data of an eight-bit unit. On the other hand, a high level digital signal is inputted to a comparing circuit 18 at a speed of eight times, is converted to a TTL level in this circuit, and is inputted to the shift register circuit 12 through the 2:1 signal path selecting circuit 19, as an eight-bit series data. In this way, a data channel is utilized effectively, and can be standardized easily.