Title:
TUNNEL TRANSISTOR AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2778447
Kind Code:
B2
Abstract:
PURPOSE: To provide a transistor utilizing tunnel phenomenon which can be highly integrated, speeded up, and multi-functional.
CONSTITUTION: The item is provided with a first semiconductor 2 of one conductivity type, a separation layer 3 consisting of a low-impurity concentration semiconductor, and a degenerated second semiconductor 4 with a conductivity type opposite to that of the first semiconductor 2 on a substrate 1. Therefore, a degenerated third semiconductor 5 with the same conductivity type as that of the first semiconductor 2, an insulation layer 6 consisting of a material with a wider forbidden band than that of the third semiconductor 5, and a gate electrode 7 on the insulation layer 6 are provided on the exposed surface of the second semiconductor 4 from the first semiconductor 2 and a ohmic junction is formed on the first semiconductor 2 and the second semiconductor 4 in a drain electrode 8 and a source electrode 9.
Inventors:
BABA TOSHIO
UEMURA TETSUYA
UEMURA TETSUYA
Application Number:
JP2072294A
Publication Date:
July 23, 1998
Filing Date:
February 18, 1994
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H01L29/68; H01L29/06; H01L29/78; H01L29/86; (IPC1-7): H01L29/78; H01L29/86
Domestic Patent References:
| JP62143475A | ||||
| JP4277680A | ||||
| JP5175494A | ||||
| JP5643176U |
Attorney, Agent or Firm:
Yoshiyuki Iwasa