VARIABLE COMBINATION RATIO CIRCUIT

Japanese Patent JP3819111

B2

PROBLEM TO BE SOLVED: To reduce the influence of a variable gain circuit occupied in a variable combination ratio circuit and to reduce a DC offset by varying the plural variable gain circuits to positive and negative polarities corresponding to the control signals and adding signals passed through the variable gain circuit among the plural signals by the same polarity regardless of the control signals.
SOLUTION: A control terminal 101 controls the gain of the variable gain circuits 131 and 132 for taking the positive and negative polarities and first signals supplied to an input terminal 102 are supplied to the variable gain circuit 131 and a subtractor 111. Also, second signals supplied to the input terminal 103 are supplied to the variable gain circuit 132 and the subtractor 111 and the output of the subtractor 111 is supplied to a coefficient device 121. Then, the output of the variable gain circuits 131 and 132 is supplied to the subtractor 112 and the output of the subtractor 112 is supplied to the coefficient device 122. The output of the coefficient devices 121 and 122 is added in an adder 113 and the result is led out from an output terminal 104. In this case, the variable gain circuits 131 and 132 for taking the positive and negative polarities are turned to the polarity for practically adding the first and second signals.

Toshikazu Fujii

JP13399397A

September 06, 2006

May 23, 1997

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Toshiba Corporation

G11B7/09; H03F3/68; H03F3/45; (IPC1-7): H03F3/68; G11B7/09; H03F3/45

JP7057329A
JP63276309A
JP56144672A
JP62245809A
JP62171019U
JP6224652A
JP6276041A
JP9130163A
JP9260978A

Saichi Suyama

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