Title:
VIDEO SIGNAL INPUT/OUTPUT DEVICE
Document Type and Number:
Japanese Patent JP3423327
Kind Code:
B2
Abstract:
PURPOSE: To obtain the video signal input/output device requiring a small num ber of picture memories by changing the transfer timing of a video signal from a first memory means to a second memory means according to the phase differ ence or time difference of a synchronizing signal.
CONSTITUTION: The time difference between synchronizing signals Vsyns 1 and 2 is detected by an input/output synchronizing signal time difference detection means 26, and a time difference judgement signal corresponding to the presence or absence of passing is outputted to a memory transfer controller 23. The controller 23 changes a timing transferring picture data from a first memory means 21 to a second memory means 24 according to a time difference judgement signal, and delays the timing of starting the transfer for a frame generating the passing of an address of read and write for a memory means 24 in the time difference between the synchronizing signal Vsyn2 accompanied by a picture signal to be outputted from a memory means 24 and the vertical synchronizing signal Vsyn 1 accompanied by an input picture signal. Thus, the video signal input/output device requiring a small number of picture memories and not generating passing or the like can be obtained.
Inventors:
Kenichiro Nimoda
Application Number:
JP23996691A
Publication Date:
July 07, 2003
Filing Date:
September 19, 1991
Export Citation:
Assignee:
Olympus Optical Co., Ltd.
International Classes:
A61B1/04; G09G5/00; G09G5/14; H04N5/073; H04N5/45; H04N7/01; (IPC1-7): H04N7/01; A61B1/04; H04N5/45
Domestic Patent References:
| JP1303879A | ||||
| JP54138326A | ||||
| JP6436174A | ||||
| JP61199385A | ||||
| JP5580965A | ||||
| JP6446375A |
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