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Patent Searching and Data


Title:
VOLTAGE CONTROL DEVICE IN SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH0737383
Kind Code:
A
Abstract:

PURPOSE: To avoid the potential and large consumption of an electricity due to a regulator placed between a reference power source and memory array by comparing a reference voltage with a voltage on a node and controlling a driving transistor based on the result of this comparison.

CONSTITUTION: Although a voltage VARY is zero at the beginning when the power source is applied, a voltage VAR fed to a transistor M3 exceeds a voltage VARY fed to a transistor M4, whereby the M3 is turned OFF and the M4 is turned ON. The M4 is also turned ON with a transistor M9 connecting an external voltage to the VARY as well. An array feeding voltage is charged toward the external voltage in this way. When the voltage VARY approaches the VAR, the state is changed with a comparator, whereby the M3 and M4 become OFF and the M9 is turned OFF. When the array feeding voltage begins to lower, the comparator is re-triggered to boost the array feeding voltage through the M9. The VAR is used to set the trigger point of the comparator, and the low impedance or the high current driving capability of the controlled array feeding power source is unnecessitated for this.


Inventors:
JIEEMUSU AARU HERUMUSU
UIRIAMU AARU KURENITSUKU
NARASHIMUHAN IENGAA
Application Number:
JP19158091A
Publication Date:
February 07, 1995
Filing Date:
July 31, 1991
Export Citation:
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Assignee:
TEXAS INSTRUMENTS INC
International Classes:
G05F1/618; G11C11/404; G11C11/407; H01L21/822; H01L27/04; (IPC1-7): G11C11/407; G05F1/618; G11C11/404; H01L21/822; H01L27/04
Attorney, Agent or Firm:
Akira Asamura (3 outside)