Title:
VOLTAGE-CONTROLLED OSCILLATOR CIRCUIT
Document Type and Number:
Japanese Patent JP3684109
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide the voltage-controlled oscillator circuit which can output clock signals of precise oscillation frequencies stably in a low-frequency range to a high-frequency range, even if the oscillation frequency of a voltage- controlled oscillation part becomes high.
SOLUTION: This voltage-controlled oscillation circuit is composed of a level conversion circuit, an amplitude control circuit, a voltage-controlled oscillation part formed by connecting differential type delay cells in a ring shape, and an output level converting circuit. The level converting circuit has limiters 11 and 14, which limit maximum values Imax and Imin of a control current and only an area where the voltage-controlled oscillation part is in normal oscillating operation is used through those limiters to improve the duty of the clock signal outputted by the voltage-controlled oscillation circuit and the stability of the frequency.
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Inventors:
Akihiko Yoshizawa
Shuichi Takada
Shuichi Takada
Application Number:
JP18632699A
Publication Date:
August 17, 2005
Filing Date:
June 30, 1999
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H03B5/20; H03B5/24; H03K3/02; H03L1/00; H03L5/00; H03L7/187; H03B1/00; H03K3/0231; (IPC1-7): H03K3/02; H03B5/20
Domestic Patent References:
JP8023264A | ||||
JP9036708A | ||||
JP9083309A | ||||
JP9214299A | ||||
JP11088126A | ||||
JP8125528A |
Attorney, Agent or Firm:
Takehiko Suzue
Sadao Muramatsu
Atsushi Tsuboi
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai
Sadao Muramatsu
Atsushi Tsuboi
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai