Title:
An insulating gated mode transistor and a manufacturing method for the same
Document Type and Number:
Japanese Patent JP5985624
Kind Code:
B2
Abstract:
An IGBT has layers between emitter and collector sides. The layers include a collector layer on the collector side, a drift layer, a base layer of a second conductivity type, a first source region arranged on the base layer towards the emitter side, a trench gate electrode arranged lateral to the base layer and extending deeper into the drift layer than the base layer, a well arranged lateral to the base layer and extending deeper into the drift layer than the base layer, an enhancement layer surrounding the base layer so as to completely separate the base layer from the drift layer and the well, an electrically conducting layer covering the well and separated from the well by a second electrically insulating layer, and a third insulating layer having a recess on top of the electrically conducting layer such that the electrically conducting layer electrically contacts a emitter electrode.
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Inventors:
Andena, Maxi
Rahimo, Munafu
Corvasse, Chara
Copter, Arnost
Rahimo, Munafu
Corvasse, Chara
Copter, Arnost
Application Number:
JP2014517832A
Publication Date:
September 06, 2016
Filing Date:
July 06, 2012
Export Citation:
Assignee:
Arbe Tehinologie Age
International Classes:
H01L29/739; H01L21/336; H01L29/12; H01L29/78
Domestic Patent References:
| JP2000307116A | ||||
| JP2007134625A | ||||
| JP2009194044A | ||||
| JP2009277792A | ||||
| JP2010129697A |
Foreign References:
| WO2010109596A1 |
Attorney, Agent or Firm:
Kurata Masatoshi
Yoshihiro Fukuhara
Nobuhisa Nogawa
Takashi Mine
Katsu Sunagawa
Yoshihiro Fukuhara
Nobuhisa Nogawa
Takashi Mine
Katsu Sunagawa