Title:
半導体基盤に活性化不純物の階層構造を提供する方法
Document Type and Number:
Japanese Patent JP4750400
Kind Code:
B2
Abstract:
A method for forming a semiconductor device with a layered structure of thin and well defined layer of activated dopants, is disclosed. In the method, a region in a semiconductor substrate is amorphized, after which the region is implanted with a first dopant at a first doping concentration. Then a solid phase epitaxy regrowth step is performed on a thin layer of desired thickness of the amorphized region, in order to activate the first dopant only in this thin layer. Subsequently, a second dopant is implanted in the remaining amorphous region at a second doping concentration. Subsequent annealing of the substrate activates the second dopant only in said remaining region, so a very abrupt transition between dopant characteristics of the thin layer with first dopant and the region with the second dopant is obtained.
More Like This:
| JP2017507489 | Silicon carbide semiconductor device and its manufacturing method |
| JP2023153225 | SEMICONDUCTOR DEVICE |
| JPH04307942 | MANUFACTURE OF SEMICONDUCTOR DEVICE |
Inventors:
Radu Catalin Surdeanu
Application Number:
JP2004303103A
Publication Date:
August 17, 2011
Filing Date:
October 18, 2004
Export Citation:
Assignee:
IMEC
NXP B.V.
NXP B.V.
International Classes:
H01L21/336; H01L21/265; H01L21/268; H01L29/78; H01L21/20
Domestic Patent References:
| JP10189970A | ||||
| JP2003243652A | ||||
| JP3131020A | ||||
| JP7321313A | ||||
| JP2002329864A | ||||
| JP4092477A | ||||
| JP2003347422A | ||||
| JP61059723A |
Foreign References:
| WO2003044860A1 |
Attorney, Agent or Firm:
Takuji Yamada
Mitsuo Tanaka
Mitsuo Wada
Masahiro Ishino
Mitsuo Tanaka
Mitsuo Wada
Masahiro Ishino