Title:
零オーバーヘッドループを実現するプロセッサ
Document Type and Number:
Japanese Patent JP7324767
Kind Code:
B2
Abstract:
A processor achieving a zero-overhead loop, includes instruction stream control circuitry and loop control circuitry. The loop control circuitry includes loop address detecting circuitry and loop end determining circuitry. By combining instructions and hardware, the loop control circuitry eliminates additional control instructions required b each loop iteration and can achieve loop acceleration with zero overhead, thereby improving the loop execution efficiency.
Inventors:
Jean, Tao
Guo, Hubeau
One, Mancho
Wei, Din Yang
Guo, Hubeau
One, Mancho
Wei, Din Yang
Application Number:
JP2020553496A
Publication Date:
August 10, 2023
Filing Date:
April 08, 2019
Export Citation:
Assignee:
Sea-Sky Microsystems Company, Limited
International Classes:
G06F9/32
Foreign References:
| US5657485 | ||||
| CN108595210A |
Attorney, Agent or Firm:
Yoshiyuki Inaba
Toshifumi Onuki
Akihiko Eguchi
Kazuhiko Naito
Toshifumi Onuki
Akihiko Eguchi
Kazuhiko Naito