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Title:
RESISTIVE RANDOM ACCESS MEMORY DEVICE AND SENSE CIRCUIT THEREOF
Document Type and Number:
Japanese Patent JP2017102993
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a resistive random access memory(RRAM) device capable of efficiently reading and writing a logical state of an RRAM cell, and a sense circuit thereof.SOLUTION: A resistive random access memory device includes: an RRAM array that is connected to a source line, stores a logical state, and includes a plurality of RRAM cells selected by a word line corresponding to a corresponding bit line; a controller that selects an RRAM cell selected by a bit line signal and the selected word line, and determines a logical state stored in the selected RRAM cell according to a sensing signal; a bit line decoder that connects a data bit line to a selected bit line according to the bit line signal; and a sense circuit that is connected to the data bit line, compares a memory current flowing in the selected RRAM with a reference current to generate a sense signal, and when the controller operates in a reset operation and a reverse direction reading operation, flows the memory current therein from the data bit line.SELECTED DRAWING: Figure 1

Inventors:
HUANG KOYING
Application Number:
JP2016121762A
Publication Date:
June 08, 2017
Filing Date:
June 20, 2016
Export Citation:
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Assignee:
HUABANG ELECTRONIC CO LTD
International Classes:
G11C13/00
Foreign References:
US20140254238A12014-09-11
US8274842B12012-09-25
US20140254238A12014-09-11
US8274842B12012-09-25
US20050045919A12005-03-03
US20050045919A12005-03-03
Attorney, Agent or Firm:
Maeda/Suzuki International Patent Corporation