Title:
半導体装置
Document Type and Number:
Japanese Patent JP7425131
Kind Code:
B2
Abstract:
To provide a semiconductor device which improves production efficiency and facilitates connection between an integrated circuit and a lead frame.SOLUTION: A semiconductor device 24 includes a sealing resin 32 having a front surface, a back surface facing the front surface, and a side surface connecting the front surface and the back surface, a first surface configured by a first region on which an integrated circuit 30 having electrode pads 50 is mounted, and a second region adjacent to the first region, and a second surface which is the second surface opposite to the first surface and configured by a third region corresponding to the first region and a fourth region which is adjacent to the third region and on which an oscillator 28 having an external electrode 34 is mounted. The semiconductor device 24 includes a die pad 26A sealed with the sealing resin, and a lead 38 having a sealing portion (inner lead 38A) which is disposed between the back surface and the die pad, and sealed with the sealing resin, a bent portion that bends in a direction to the back surface, and an exposed portion (outer lead 38B) exposed from the side surface of the sealing resin.SELECTED DRAWING: Figure 3
Inventors:
Yuichi Yoshida
Kengo Takemasa
Norihisa Sone
Kazuya Yamada
Akihiro Takei
Kengo Takemasa
Norihisa Sone
Kazuya Yamada
Akihiro Takei
Application Number:
JP2022128331A
Publication Date:
January 30, 2024
Filing Date:
August 10, 2022
Export Citation:
Assignee:
LAPIS Semiconductor Co., Ltd.
International Classes:
H01L21/60
Domestic Patent References:
| JP2005033761A | ||||
| JP2007074066A | ||||
| JP2008300663A |
Foreign References:
| WO1996039715A1 |
Attorney, Agent or Firm:
Kazunobu Kato
Hiroshi Fukuda
Hiroshi Fukuda