Title:
【発明の名称】バッファ記憶装置
Document Type and Number:
Japanese Patent JP3238390
Kind Code:
B2
Abstract:
PURPOSE:To perform the data storing actions at a high speed with a buffer storage by unifying a move-in action and a store action carried out by a store instruction into an action for registration of data to a buffer and changing the partial write into a full store action against a main storage. CONSTITUTION:A comparator 8 compares the address of a store instruction with the contents of a storage access register 1. When the equality is secured in this comparison and the valid bit stored in a move-in buffer 3 is effective, the address of the store instruction is rewritten into a full store form according to the contents of the byte mark stored in a store buffer 2. The store data rewritten into the full store form is written into a buffer 5 and also outputted to the buffer 2 or a selector 9. The data merged by a merge circuit 4 are written into the buffer 5 in terms of the output of the circuit 4 if the output conditions of the buffer 2 are not ready to be sent to a main storage. Then the merged data are sent to the main storage via the selector 5 if the output conditions of the buffer 2 are ready to be sent. The merged data are changed into a full store form and registered again.
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Inventors:
Keizo Nozawa
Application Number:
JP6810790A
Publication Date:
December 10, 2001
Filing Date:
March 20, 1990
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F12/04; G06F12/00; G06F12/08; (IPC1-7): G06F12/08; G06F12/00; G06F12/04
Domestic Patent References:
| JP5475231A | ||||
| JP63311548A | ||||
| JP57189385A | ||||
| JP6431238A | ||||
| JP6459441A | ||||
| JP2259945A | ||||
| JP2259946A | ||||
| JP3171340A |
Attorney, Agent or Firm:
Hiroshi Dobashi