Title:
4h-SiC INSULATED GATE BIPOLAR TRANSISTOR, METHOD FOR MANUFACTURING SAME, AND POWER CONVERSION DEVICE
Document Type and Number:
WIPO Patent Application WO/2016/030963
Kind Code:
A1
Abstract:
A structure of the present invention makes it possible to provide a device having less minority carrier lifetime change due to silicide formation in a collector p+ collector region, and no reliability degradation, such as conduction degradation, since the film thickness of a rear-surface silicide region in contact with a rear-surface collector electrode is less than that of a front-surface silicide layer, said rear-surface silicide region containing Al, less SiC is to be eroded due to silicidation, and a thermal load applied during the silicide formation is small.
Inventors:
YOSHIMOTO HIROYUKI (JP)
WATANABE NAOKI (JP)
MORITSUKA TSUBASA (JP)
FUJISAKI KOJI (JP)
WATANABE NAOKI (JP)
MORITSUKA TSUBASA (JP)
FUJISAKI KOJI (JP)
Application Number:
PCT/JP2014/072288
Publication Date:
March 03, 2016
Filing Date:
August 26, 2014
Export Citation:
Assignee:
HITACHI LTD (JP)
International Classes:
H01L29/78; H01L21/336; H01L29/12; H01L29/739
Foreign References:
JP2013058603A | 2013-03-28 | |||
JP2013058602A | 2013-03-28 | |||
JP2010205758A | 2010-09-16 | |||
JP2010529646A | 2010-08-26 |
Attorney, Agent or Firm:
SEIRYO I. P. C. (JP)
青稜 patent business corporation (JP)
青稜 patent business corporation (JP)
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