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Patent Searching and Data


Title:
ACTIVE MATRIX SUBSTRATE, ACTIVE MATRIX SUBSTRATE INSPECTION METHOD, DISPLAY PANEL, AND DISPLAY PANEL MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2012/140815
Kind Code:
A1
Abstract:
An active matrix substrate comprises: a substrate; a plurality of gate lines (102) which are positioned upon the substrate; a plurality of source lines (103) which are positioned in a direction which intersects the plurality of gate lines (102) upon the substrate; terminals (141) which are disposed for each data line block (B) wherein every m source lines (103) (where m is an integer greater than 1) are made into blocks; first selection circuits (121) which are disposed for each data line block (B) and which connect at least one of the source lines (103) which is selected from the m source lines (103) with the terminals (141); terminals (142) which are disposed for each n data line blocks (B) (where n is an integer greater than 1); and second selection circuits (122) which are disposed for each n data line blocks (B) and which connect at least one of the source lines (103) which is selected from the m×n source lines (103) with the terminals (142).

Inventors:
TAJIKA KENICHI
SHIROUZU HIROSHI
Application Number:
PCT/JP2012/000550
Publication Date:
October 18, 2012
Filing Date:
January 27, 2012
Export Citation:
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Assignee:
PANASONIC CORP (JP)
TAJIKA KENICHI
SHIROUZU HIROSHI
International Classes:
G09G3/20; G01R31/02; G09F9/00; G09F9/30; G09G3/30; H01L27/32; H01L51/50; H05B33/10
Foreign References:
JPH07260857A1995-10-13
JP2004139092A2004-05-13
JP2006047197A2006-02-16
JP2007206440A2007-08-16
JP2009063954A2009-03-26
Attorney, Agent or Firm:
NII, Hiromori (JP)
New house Extensive 守 (JP)
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Claims: